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DV- Sr Verification Engineers / Verification Lead

Date:  03-Aug-2022
Location:  California
State:  Palo
Country:  US
Company:  LTTS

Minimum requirements:

BS or MS in  E&C  or electrical engineering.
10+ years of work experience in designing, verifying, and validating complex hardware systems.
Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.
Proficient in debugging SOC, CPU, GPU, fabric, NOC, memory, various protocols like AXI, PCIE or Ethernet.
Knowledge of advanced computer architecture and system architecture concepts.
Experience with writing directed and random test cases.
Experience with design verification and validation methodologies and strategies.
Experience with power and performance modeling concepts.
Good communication skills, and a team player.
Able to work independently in a fast-paced team and environment.