FPGA SV/UVM Verification Engineer
Date:
16 Nov 2023
Location:
Cedar Rapids
State:
IA
Country:
US
Company:
LTTS
Job description:
Ranked in the order of the qualification expectations:
|
5+ Years of FPGA Requirement based Verification |
|
Experience with System Verilog |
|
Experience with Test Bench Creation, Test Bench Troubleshooting, Test Case development, Test Procedure Development and result analysis |
|
Experience with UVM |
|
DO-254 Process knowledge is desired |
|
Video/Image Processing Project Experience
|