DV Lead

Date:  18 Nov 2023
Location:  Bangalore
Company:  LTTS

Candidate must have a Bachelor's degree in  Electronics ( ECE, EEE, CE) and 7+ years of experience in: - OR - a Master's degree in 12+ years of experience in:

  • Verification / design experience in SOC , ASIC, custom IC designs, or FPGA
  • Coherency and computer architecture experience
  • System Verilog and VMM/OVM/UVM
  • Scripting Languages: Perl/Python/TCL
  • Creating and documenting design and verification plans